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Cell Microprocessor

Essay by   •  December 11, 2010  •  Research Paper  •  10,793 Words (44 Pages)  •  2,333 Views

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Introduction

''Cell'' is a microprocessor jointly developed by Sony, Toshiba and IBM. The Cell architecture is intended to be scalable through the use of vector processing. The first major commercial application of Cell is in Sony's upcoming PlayStation 3 game console. In 2000, Sony Inc., Toshiba Corp., and IBM formed an alliance ("STI") to design and build the processor. The STI Design Center in Austin, Texas opened in March 2001. The Cell was designed over a period of four years, using enhanced versions of the design tools for the POWER4 processor. Over 400 engineers from the three companies worked together in Austin, with critical support from eleven of IBM's design centers.

Although it's been primarily touted as the technology for the PlayStation 3, Cell is designed for much more. Sony and Toshiba, both being major electronics manufacturers buy in all manner of different components. One of the reasons for Cell's development is they want to save costs by building their own components. Next generation consumer technologies such as Blue-ray, HDTV, HD Camcorders and of course the PS3 will all require a very high level of computing power and they are going to need the chips to provide it. Cell will be used for all of these and more. IBM will also be using the chips in servers. The partners can also sell the chips to 3rd party manufacturers.

The Cell architecture is like nothing we have ever seen in commodity microprocessors, it is closer in design to multiprocessor vector supercomputers. The Cell developers have taken this kind of technology and for the first time are bringing it to your home. The aim is produce a low cost system with a massive increase in compute performance over existing systems. Putting such an architecture on a single chip is a huge, complex project, no other manufacturer appears to have even attempted to do anything this ambitious to date.

It is an architecture for high performance distributed computing. It is comprised of hardware and software Cells, software Cells consist of data and programs, these are sent out to the hardware Cells where they are computed, the results are then returned. This architecture is not fixed, if you have a computer, PS3 and HDTV that have Cell processors they can co-operate on problems. According to IBM the Cell performs 10x faster than existing CPUs on many applications. This may sound ludicrous but GPU's (Graphical Processors Units) already deliver similar or even higher sustained performance in many non-graphical applications. The technology in the Cell is similar to that in GPU's so such high performance is certainly well within the realm of possibilities. The big difference is though that Cell is a lot more general purpose so can be usable for a wider variety of tasks.

CELL Basics

Members of the CELL processor family share basic building blocks, and depending on the requirement of the application, specific versions of the CELL processor can be quickly configured and manufactured to meet that need. The basic building blocks shared by members of the CELL family of processor are the following:

* The PowerPC Processing Element (PPE)

* The Synergistic Processing Element (SPE)

* The L2 Cache

* The internal Element Interconnect Bus (EIB)

* The shared Memory Interface Controller (MIC) and

* The Flex IO interface

While the Cell chip can have a number of different configurations, the basic configuration is composed of one "Power Processor Element" ("PPE"), and multiple "Synergistic Processing Elements" ("SPE"). The PPE's and SPE's are linked together by an internal high-speed bus dubbed "Element Interconnect Bus" ("EIB"). Due to the nature of its applications, Cell is optimized towards single precision floating point computation though it can still perform more general purpose computing tasks due to its PPE.

Specifications

The final specifications haven't been given out yet but this is what we know so far:

* Capable of running at speeds beyond 4 GHz.

* Memory bandwidth: 25.6 GBytes per second.

* I/O bandwidth: 76.8 GBytes per second.

* 256 GFLOPS (Single precision at 4 GHz).

* 256 GOPS (Integer at 4 GHz).

* 25 GFLOPS (Double precision at 4 GHz).

* 235 square mm.

* 235 million transistors.

Power consumption has been estimated at 60 - 80 Watts at 4 GHz for the prototype but this could change in the production version.

Chip manufacturing is a complex process and the chips that appear at the end of the production line vary in capabilities and some have errors. While they can go higher, because of the vagaries of manufacturing, economics and heat dissipation the Cell that will be used in the PS3 is clocked at 3.2 GHz and will have only 7 SPE's. Cells with 6 SPE's will be used in consumer electronics.

Components

The Power Processor Element (PPE)

The PPE is a conventional microprocessor core that sets up tasks for the SPE's to do. In a Cell based system the PPE will run the operating system and most of the applications but compute intensive parts of the OS and applications will be offloaded to the SPE's.

As an example let's say I was running an audio synthesizer application. The OS and most of the application would run on the PPE but the highly intensive audio generation and processing would be off-loaded to the SPE's.

The PPE is a 64 bit, "Power Architecture" processor with 512K cache. Power Architecture is a catch all term IBM have been using for a while to describe both PowerPC and POWER processors. This type of microprocessor is not used in PCs but compatible processors are found in Apple Macintosh systems. The PPE is capable of running POWER or PowerPC binaries.

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